1 // arch/x64/descriptors.cc -- code to manage segment/trap/interrupt descriptors
3 // This software is copyright (c) 2006 Scott Wood <scott@buserror.net>.
5 // Permission is hereby granted, free of charge, to any person obtaining a copy of
6 // this software and associated documentation files (the "Software"), to deal with
7 // the Software without restriction, including without limitation the rights to
8 // use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies
9 // of the Software, and to permit persons to whom the Software is furnished to do
10 // so, subject to the following condition:
12 // The above copyright notice and this permission notice shall be
13 // included in all copies or substantial portions of the Software.
15 // THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 // IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
17 // FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
18 // CONTRIBUTORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 // LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
20 // OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS WITH THE
23 #include <kern/types.h>
24 #include <arch/addrs.h>
25 #include <arch/thread.h>
34 using Arch::Priv::Descriptor;
35 using Arch::Priv::TSS;
36 using Arch::Priv::tss;
38 Descriptor x64_gdt[1024] = {
39 {}, // The first entry is reserved for the NULL selector.
44 type: 2, // data segment, writable
55 { // 0x10: 32-bit code
59 type: 10, // code segment, readable
70 { // 0x18: 64-bit code
74 type: 10, // code segment, readable
86 limit_low: sizeof(TSS) - 4,
104 struct X64DescriptorTablePointer {
110 X64DescriptorTablePointer x64_gdtr = {
111 // G++ still won't handle complex labelled initializers, so
112 // we have to explicitly initialize pad.
114 pad: { 0, 0, 0, 0, 0, 0 },
115 limit: sizeof(x64_gdt),
116 address: reinterpret_cast<u64>(&x64_gdt)
119 X64DescriptorTablePointer x64_gdtr_phys = {
120 pad: { 0, 0, 0, 0, 0, 0 },
121 limit: sizeof(x64_gdt),
122 address: reinterpret_cast<u64>(&x64_gdt) - KERNEL_START
125 struct X64InterruptDescriptor {
139 static X64InterruptDescriptor idt[256];
141 static X64DescriptorTablePointer idtr = {
142 pad: { 0, 0, 0, 0, 0, 0 },
144 address: reinterpret_cast<u64>(&idt)
147 // Set a gate for INT num to start executing at addr.
149 // If ints_off is set, then interrupts will remain disabled until
150 // software enables them; otherwise, the interrupt flag will have the
151 // same state as in the code that was interrupted.
153 // If user is true, then this gate can be called directly from
154 // userspace with the INT instruction. Otherwise, usermode
155 // INT to this gate will cause a GPF, but it may still be reached
156 // from user code via hardware interrupt or exception.
158 // If stack_index is non-zero, use the specified alternate stack even if
159 // interrupting kernel code.
161 static void set_int_gate(int num, void *addrptr, bool ints_off = false,
162 bool user = false, int stack_index = 0)
164 u64 addr = (u64)addrptr;
166 X64InterruptDescriptor desc = {
167 offset_low: addr & 0xffff,
169 stack_index: stack_index,
171 type: ints_off ? 14 : 15,
175 offset_mid: (addr >> 16) & 0xffff,
176 offset_high: addr >> 32
182 extern int x64_diverr, x64_gpf, x64_page_fault, x64_invalid_insn;
183 extern void *x64_irqs[256];
189 // GCC 4.0 pukes on "m" (&idtr.limit), saying it's not
190 // directly addressable.
192 asm volatile("lidtq 6(%0)" : : "r" (&idtr) : "memory");
194 set_int_gate(0, &x64_diverr);
195 set_int_gate(6, &x64_invalid_insn);
196 set_int_gate(13, &x64_gpf);
197 set_int_gate(14, &x64_page_fault, true);
199 for (int i = 0x20; i < 0x30; i++)
200 set_int_gate(i, x64_irqs[i]);