1 // arch/x86/descriptors.cc -- code to manage segment/trap/interrupt descriptors
3 // This software is copyright (c) 2006 Scott Wood <scott@buserror.net>.
5 // Permission is hereby granted, free of charge, to any person obtaining a copy of
6 // this software and associated documentation files (the "Software"), to deal with
7 // the Software without restriction, including without limitation the rights to
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9 // of the Software, and to permit persons to whom the Software is furnished to do
10 // so, subject to the following conditions:
12 // * Redistributions of source code must retain the above copyright notice,
13 // this list of conditions and the following disclaimers.
15 // * Redistributions in binary form must reproduce the above copyright notice,
16 // this list of conditions and the following disclaimers in the
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19 // * The names of the Software's authors and/or contributors
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21 // this Software without specific prior written permission.
23 // THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
24 // IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
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31 #include <kern/types.h>
32 #include <arch/addrs.h>
33 #include <arch/thread.h>
42 using Arch::Priv::Descriptor;
43 using Arch::Priv::TSS;
44 using Arch::Priv::tss;
46 Descriptor x86_gdt[1024] = {
47 {}, // The first entry is reserved for the NULL selector.
52 type: 2, // data segment, writable
67 type: 10, // code segment, readable
79 limit_low: sizeof(tss),
95 struct X86DescriptorTablePointer {
101 X86DescriptorTablePointer x86_gdtr = {
102 // G++ still won't handle complex labelled initializers, so
103 // we have to explicitly initialize pad.
105 pad: { 0, 0, 0, 0, 0, 0 },
106 limit: sizeof(x86_gdt),
107 address: reinterpret_cast<u32>(&x86_gdt)
110 X86DescriptorTablePointer x86_gdtr_phys = {
111 pad: { 0, 0, 0, 0, 0, 0 },
112 limit: sizeof(x86_gdt),
113 address: reinterpret_cast<u32>(&x86_gdt) - KERNEL_START
116 struct X86InterruptDescriptor {
128 static X86InterruptDescriptor idt[256];
130 static X86DescriptorTablePointer idtr = {
131 pad: { 0, 0, 0, 0, 0, 0 },
133 address: reinterpret_cast<u32>(&idt)
136 // Set a gate for INT num to start executing at addr.
138 // If ints_off is set, then interrupts will remain disabled until
139 // software enables them; otherwise, the interrupt flag will have the
140 // same state as in the code that was interrupted.
142 // If user is true, then this gate can be called directly from
143 // userspace with the INT instruction. Otherwise, usermode
144 // INT to this gate will cause a GPF, but it may still be reached
145 // from user code via hardware interrupt or exception.
147 // If stack_index is non-zero, use the specified alternate stack even if
148 // interrupting kernel code.
150 static void set_int_gate(int num, void *addrptr, bool ints_off = false,
151 bool user = false, int stack_index = 0)
153 u32 addr = (u32)addrptr;
155 X86InterruptDescriptor desc = {
156 offset_low: addr & 0xffff,
158 stack_index: stack_index,
160 type: ints_off ? 14 : 15,
164 offset_high: (addr >> 16) & 0xffff,
170 extern int x86_diverr, x86_debug, x86_breakpoint;
171 extern int x86_gpf, x86_page_fault, x86_invalid_insn, x86_int99_entry;
172 extern void *x86_irqs[256];
178 // GCC 4.0 pukes on "m" (&idtr.limit), saying it's not
179 // directly addressable.
181 asm volatile("lidtl 6(%0)" : : "r" (&idtr) : "memory");
183 set_int_gate(0, &x86_diverr);
184 set_int_gate(1, &x86_debug);
185 set_int_gate(3, &x86_breakpoint);
186 set_int_gate(6, &x86_invalid_insn);
187 set_int_gate(13, &x86_gpf);
188 set_int_gate(14, &x86_page_fault, true);
189 set_int_gate(0x99, &x86_int99_entry);
191 for (int i = 0x20; i < 0x30; i++)
192 set_int_gate(i, x86_irqs[i], true);